Neural network-based array synthesis in presence of obstacles.
- Published in:
- International Journal of Numerical Modelling, 2006, v. 19, n. 1, p. 1, doi. 10.1002/jnm.595
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- Publication type:
- Article
Works matching IS 08943370 AND DT 2006 AND VI 19 AND IP 1
Results: 5
1
2
Study of parallel numerical methods for semiconductor device simulation.
- Published in:
- International Journal of Numerical Modelling, 2006, v. 19, n. 1, p. 15, doi. 10.1002/jnm.596
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- Publication type:
- Article
3
A fast power loss calculation method for long real time thermal simulation of IGBT modules for a three-phase inverter system.
- Published in:
- International Journal of Numerical Modelling, 2006, v. 19, n. 1, p. 33, doi. 10.1002/jnm.597
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- Publication type:
- Article
4
Accelerating the transient simulation of semiconductor devices using filter-bank transforms.
- Published in:
- International Journal of Numerical Modelling, 2006, v. 19, n. 1, p. 47, doi. 10.1002/jnm.598
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- Publication type:
- Article
5
Boundary conditions in TLM diffusion modelling.
- Published in:
- International Journal of Numerical Modelling, 2006, v. 19, n. 1, p. 69, doi. 10.1002/jnm.599
- By:
- Publication type:
- Article