Found: 29
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Zero standby power crop water-stress detector leading to the optimization of water usage and yield.
- Published in:
- Scientific Reports, 2022, v. 12, n. 1, p. 1, doi. 10.1038/s41598-022-16419-5
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- Article
Prediction-Based Error Correction for GPU Reliability with Low Overhead.
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- Electronics (2079-9292), 2020, v. 9, n. 11, p. 1849, doi. 10.3390/electronics9111849
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- Article
Efficient Systolic-Array Redundancy Architecture for Offline/Online Repair.
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- Electronics (2079-9292), 2020, v. 9, n. 2, p. 338, doi. 10.3390/electronics9020338
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- Article
Histogram-Based Calibration Method for Pipeline ADCs.
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- PLoS ONE, 2015, v. 10, n. 6, p. 1, doi. 10.1371/journal.pone.0129736
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- Article
Visual defect obfuscation based self-supervised anomaly detection.
- Published in:
- Scientific Reports, 2024, v. 14, n. 1, p. 1, doi. 10.1038/s41598-024-69698-5
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- Article
A low-cost concurrent TSV test architecture with lossless test output compression scheme.
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- PLoS ONE, 2019, v. 14, n. 8, p. 1, doi. 10.1371/journal.pone.0221043
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- Article
Low-Power Scan Correlation-Aware Scan Cluster Reordering for Wireless Sensor Networks.
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- Sensors (14248220), 2021, v. 21, n. 18, p. 6111, doi. 10.3390/s21186111
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- Article
Scan-Chain-Fault Diagnosis Using Regressions in Cryptographic Chips for Wireless Sensor Networks.
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- Sensors (14248220), 2020, v. 20, n. 17, p. 4771, doi. 10.3390/s20174771
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- Article
Proof of Concept of Home IoT Connected Vehicles.
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- Sensors (14248220), 2017, v. 17, n. 6, p. 1289, doi. 10.3390/s17061289
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- Article
Eco Assist Techniques through Real-time Monitoring of BEV Energy Usage Efficiency.
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- Sensors (14248220), 2015, v. 15, n. 7, p. 14946, doi. 10.3390/s150714946
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- Article
Ultra‐Narrowband Metamaterial Absorbers for High Spectral Resolution Infrared Spectroscopy.
- Published in:
- Advanced Optical Materials, 2019, v. 7, n. 2, p. N.PAG, doi. 10.1002/adom.201801236
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- Article
A low-cost DAC BIST structure using a resistor loop.
- Published in:
- PLoS ONE, 2017, v. 12, n. 2, p. 1, doi. 10.1371/journal.pone.0172331
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- Article
A debug scheme to improve the error identification in post-silicon validation.
- Published in:
- PLoS ONE, 2018, v. 13, n. 9, p. 1, doi. 10.1371/journal.pone.0202216
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- Article
Fully Programmable Memory BIST for Commodity DRAMs.
- Published in:
- ETRI Journal, 2015, v. 37, n. 4, p. 787, doi. 10.4218/etrij.15.0115.0040
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- Article
New Thermal-Aware Voltage Island Formation for 3D Many-Core Processors.
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- ETRI Journal, 2015, v. 37, n. 1, p. 118, doi. 10.4218/etrij.15.0114.0257
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- Article
A New Multi-site Test for System-on-Chip Using Multi-site Star Test Architecture.
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- ETRI Journal, 2014, v. 36, n. 2, p. 293, doi. 10.4218/etrij.14.0113.0469
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- Article
A Flexible Programmable Memory BIST for Embedded Single-Port Memory and Dual-Port Memory.
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- ETRI Journal, 2013, v. 35, n. 5, p. 808, doi. 10.4218/etrij.13.0112.0717
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- Article
A Very Efficient Redundancy Analysis Method Using Fault Grouping.
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- ETRI Journal, 2013, v. 35, n. 3, p. 433, doi. 10.4218/etrij.13.0112.0467
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- Article
Data Randomization Scheme for Endurance Enhancement and Interference Mitigation of Multilevel Flash Memory Devices.
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- ETRI Journal, 2013, v. 35, n. 1, p. 166, doi. 10.4218/etrij.13.0212.0273
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- Article
Simultaneous Static Testing of A/D and D/A Converters Using a Built-in Structure.
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- ETRI Journal, 2013, v. 35, n. 1, p. 109, doi. 10.4218/etrij.13.0112.0198
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- Article
A Fast Redundancy Analysis Algorithm in ATE for Repairing Faulty Memories.
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- ETRI Journal, 2012, v. 34, n. 3, p. 478, doi. 10.4218/etrij.11.0211.0378
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- Article
Yield Enhancement Techniques for 3D Memories by Redundancy Sharing among All Layers.
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- ETRI Journal, 2012, v. 34, n. 3, p. 388, doi. 10.4218/etrij.12.0111.0643
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- Article
A Die-Selection Method Using Search-Space Conditions for Yield Enhancement in 3D Memory.
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- ETRI Journal, 2011, v. 33, n. 6, p. 904, doi. 10.4218/etrij.11.0111.0108
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- Article
A Twin Symbol Encoding Technique Based on Run-Length for Efficient Test Data Compression.
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- ETRI Journal, 2011, v. 33, n. 1, p. 140, doi. 10.4218/etrij.11.0210.0154
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- Article
High Repair Efficiency BIRA Algorithm with a Line Fault Scheme.
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- ETRI Journal, 2010, v. 32, n. 4, p. 642, doi. 10.4218/etrij.10.0210.0097
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- Article
A Built-In Redundancy Analysis with a Minimized Binary Search Tree.
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- ETRI Journal, 2010, v. 32, n. 4, p. 638, doi. 10.4218/etrij.10.0210.0032
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- Article
A Novel BIRA Method with High Repair Efficiency and Small Hardware Overhead.
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- ETRI Journal, 2009, v. 31, n. 3, p. 339, doi. 10.4218/etrij.09.0209.0024
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- Article
An Effective Power Reduction Methodology for Deterministic BIST Using Auxiliary LFSR.
- Published in:
- Journal of Electronic Testing, 2008, v. 24, n. 6, p. 591, doi. 10.1007/s10836-008-5077-z
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- Article
A New Scan Architecture for Both Low Power Testing and Test Volume Compression Under SOC Test Environment.
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- Journal of Electronic Testing, 2008, v. 24, n. 4, p. 365, doi. 10.1007/s10836-008-5062-6
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- Article