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- Title
Frequency locked loop architecture for phase noise reduction in wideband low-noise microwave oscillators.
- Authors
Ávila-Ruiz, Juan M.; Moreno-Pozas, Laureano; Durán-Valdeiglesias, Elena; Moscoso-Mártir, Alvaro; Molina-Fernández, Iñigo; de-Oliva-Rubio, Jose
- Abstract
A frequency locked loop (FLL) for phase noise reduction of wideband voltage controlled oscillators is proposed. The key building block of the system is a low noise (-160 dBV/Hz) and high sensitivity (22 V/GHz) delay line frequency discriminator with 5-8 GHz coverage, which makes use of a high performance multilayer hybrid. The authors derive closedform, universal design equations for the maximum noise reduction and stability of the FLL circuitry. Application of the proposed technique to a state-of-the-art voltage controlled oscillator operating in the 5-8 GHz band yields a phase noise reduction of 8-10 dB at 100 kHz and 5 dB at 1 MHz off the carrier, which shows the results are in good agreement with the simulated results; so phase noise better than -107 dBc/Hz at 100 kHz and better than -123.5 dBc/Hz at 1 MHz is obtained.
- Subjects
PHASE noise; BROADBAND communication systems; MICROWAVE oscillators; FREQUENCY-locked loops; VOLTAGE-controlled oscillators; DELAY lines
- Publication
IET Microwaves, Antennas & Propagation (Wiley-Blackwell), 2013, Vol 7, Issue 11, p869
- ISSN
1751-8725
- Publication type
Article
- DOI
10.1049/iet-map.2013.0114