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- Title
A Novel Gate Driver Circuit Design for Ultra Slim Border.
- Authors
Li, Chang-Yi; Huang, Yu-Sheng; Chen, Ying-Ying; Chen, Chia-Wei; Yeh, Cheng-Nan; Sugiura, Norio
- Abstract
A novel circuit design for a gate driver on array (GOA) is proposed. With conventional GOA circuit plus additional clock signals worked as multiplexer, the total GOA circuit width can be reduced to 63.7% compared to original design. Furthermore, a new stabilization mechanism is proposed, which results in more stable holding period and faster rising and falling time.
- Subjects
LOGIC circuits; ELECTRIC circuit design &; construction
- Publication
SID Symposium Digest of Technical Papers, 2016, Vol 47, Issue 1, p1276
- ISSN
0097-966X
- Publication type
Article
- DOI
10.1002/sdtp.10914