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- Title
CMOS low‐power bandwidth‐improved derivative superposition mixer using parasitic NPN BJTs.
- Authors
Wang, Keping; Lei, Xuemei
- Abstract
A low‐power bandwidth‐improved derivative superposition (DS) mixer in a standard 90 nm CMOS technology is analysed in depth. The negative gm″ in saturated NMOS pseudo‐differential transistor is compensated by the positive gm″ in the parasitic NPN bipolar junction transistor. Compared with the traditional DS mixer using the dual‐NMOS method, the proposed DS mixer shows a wider bandwidth owing to the lower parasitic capacitance at the base. The maximum conversion gain of the DS mixer is 7.2 dB with the 1 dB frequency bandwidth from 0.5 to 6 GHz. Compared with the Gilbert‐type mixer, the third‐order input interception point (IIP3) is improved by about 7.5 dB. The DS mixer consumes a DC power of 3.8 mW under 1 V supply.
- Publication
Electronics Letters (Wiley-Blackwell), 2013, Vol 49, Issue 25, p1605
- ISSN
0013-5194
- Publication type
Article
- DOI
10.1049/el.2013.2804