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- Title
A Learning Method for Block-Based Neural Networks with Structure Search Based on the Least Number of Routes.
- Authors
NORIMATSU, NAOTO; KOAKUTSU, SEIICHI; OKAMOTO, TAKASHI
- Abstract
SUMMARY In recent years, a study of evolvable hardware (EHW) which can adapt to new an unknown environment attracts much attention among hardware designers. EHW is reconfigurable hardware and can be implemented combining reconfigurable devices such as FPGA (Field Programmable Gate Array) and evolutionary computation such as Genetic Algorithms (GAs). As such research of EHW, Block-Based Neural Networks (BBNNs) have been proposed. BBNNs have simplified network structures and their weights and network structure can be optimized at the same time using GAs. The learning of BBNNs without constraint of network structure is, however, not efficient because the degree of difficulty of learning depends on network structures. In this paper, we proposed a new evaluation index of network structures for BBNNs based on the least number of routes which are from inputs to outputs, and apply it to the structure search. The learning of BBNNs is efficiently executed with structure constraint condition based on the proposed index because the network structures which are difficult to learn are excluded. In order to evaluate the proposed method, we apply it to XOR, 3 bit-parity, square function approximation, contact lenses fitting, Fisher's iris classification, and Wine classification. Results of computational experiments indicate the validity of the proposed method.
- Subjects
ARTIFICIAL neural networks; FIELD programmable gate arrays; HARDWARE design &; construction; GENETIC algorithms; RANDOM numbers
- Publication
Electronics & Communications in Japan, 2017, Vol 100, Issue 12, p3
- ISSN
1942-9533
- Publication type
Article
- DOI
10.1002/ecj.11980