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- Title
LOW POWER SRAM CELL DESIGN WITH POWER GATING TECHNIQUE.
- Authors
SEETHA, V.
- Abstract
The power consumption of Static Random-Access Memory (SRAM) cell is considered as a major factor in modern technologies due to voltage scaling. The existing SRAM cell design of consumes more power at higher frequencies. In the proposed work, power reduction is achieved in various radiation-hardened SRAM cell designs which is based on power gating technique. Hence, the power gated voltage (VDD) design technique is employed to reduce power consumption.
- Subjects
STATIC random access memory; DESIGN techniques
- Publication
i-Manager's Journal on Circuits & Systems, 2022, Vol 10, Issue 1, p25
- ISSN
2321-7502
- Publication type
Article
- DOI
10.26634/jcir.10.1.18569