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- Title
Ultra-low power pass-transistor-logic-based delay line design for sub-threshold applications.
- Authors
Tadros, R. N.; Dasari, N.; Beerel, P. A.
- Abstract
Designs that operate at sub-threshold voltages are a promising response to the ultra-low power demands of many modern applications with relaxed performance requirements. Towards this approach, a pass-transistor-logic-based programmable delay line (DL) circuit is presented that is designed specifically for sub-threshold operation. Compared with the commonly used design, the DL consumes 79.2% less dynamic energy, 83.5% less leakage power, 47.2% better linearity across codewords, 58.6% smaller active area, and with similar resiliency to variations across Monte Carlo simulations.
- Subjects
PROGRAMMABLE array logic; DELAY lines; AUTOMATIC control systems; AUTOMATIC timers; MONTE Carlo method
- Publication
Electronics Letters (Wiley-Blackwell), 2016, Vol 52, Issue 23, p1910
- ISSN
0013-5194
- Publication type
Article
- DOI
10.1049/el.2016.3240