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- Title
Hardware Acceleration of Digital Pulse Shape Analysis Using FPGAs.
- Authors
González, César; Ruiz, Mariano; Carpeño, Antonio; Piñas, Alejandro; Cano-Ott, Daniel; Plaza, Julio; Martinez, Trino; Villamarin, David
- Abstract
The BC501A sensor is a liquid scintillator frequently used in nuclear physics for detecting fast neutrons. This paper describes a hardware implementation of digital pulse shape analysis (DPSA) for real-time analysis. DPSA is an algorithm that extracts the physically relevant parameters from the detected BC501A signals. The hardware solution is implemented in a MicroTCA system that provides the physical, mechanical, electrical, and cooling support for an AMC board (NAMC-ZYNQ-FMC) with a Xilinx ZYNQ Ultrascale-MP SoC. The Xilinx FPGA programmable logic implements a JESD204B interface to high-speed ADCs. The physical and datalink JESD204B layers are implemented using hardware description language (HDL), while the Xilinx high-level synthesis language (HLS) is used for the transport and application layers. The DPSA algorithm is a JESD204B application layer that includes a FIR filter and a constant fraction discriminator (CFD) function, a baseline calculation function, a peak detection function, and an energy calculation function. This architecture achieves an analysis mean time of less than 100 µs per signal with an FPGA resource utilization of about 50% of its most used resources. This paper presents a high-performance DPSA embedded system that interfaces with a 1 GS/s ADC and performs accurate calculations with relatively low latency.
- Subjects
FINITE impulse response filters; COMPUTER hardware description languages; LIQUID scintillators; NEUTRON counters; NUCLEAR physics; FAST neutrons; SUCCESSIVE approximation analog-to-digital converters; ENERGY function; ANALOG-to-digital converters
- Publication
Sensors (14248220), 2024, Vol 24, Issue 9, p2724
- ISSN
1424-8220
- Publication type
Article
- DOI
10.3390/s24092724