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- Title
A VLSI placement method using genetic algorithm considering hierarchical structure of solution space.
- Authors
Koakutsu, Seiichi; Urushida, Yuji; Hirata, Hironori
- Abstract
This paper proposes a new VLSI placement method using genetic algorithm considering the hierarchical structure of solution space. In the proposed method, we introduce a special solution encoding which represents the hierarchical structure of solution space, and new crossover operators which can maintain the hierarchical structure of the encoded solution. Making use of the hierarchical nature of the solution space, the proposed method can search the solution space efficiently. We demonstrate the efficiency of the proposed method by applying it to VLSI cell placement problems. Computational experiments show that the proposed method obtains better placement results within less computation time compared with conventional genetic algorithm. © 2000 Scripta Technica, Electr Eng Jpn, 131(1): 86–93, 2000
- Subjects
GENETIC algorithms; STANDARD cells; COMBINATORIAL optimization; SIMULATED annealing; GENES; ELECTRICAL engineering
- Publication
Electrical Engineering in Japan, 2000, Vol 131, Issue 1, p86
- ISSN
0424-7760
- Publication type
Article
- DOI
10.1002/(SICI)1520-6416(20000415)131:1<86::AID-EEJ9>3.0.CO;2-5