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- Title
Periodic Boundary Cellular Automata Based Wear Leveling for Resistive Memory.
- Authors
Sarkar, Sutapa; Ghosh, Manisha; Sikdar, Biplab Kumar; Saha, Mousumi
- Abstract
—Locality of reference is preferable every time while writing to cache blocks. The write process may repeat only on a few adjacent cache blocks. As a result, it creates a stress on those blocks. If resistive memory is chosen to be the fundamental technology for the write purpose, the write sensitivity on those blocks increases more. It causes a loss to the durability of the memory. It can be damaged earlier in comparison to NAND/NOR Flash memories (105 to 105 program/erase cycles). This non-uniformity in writes as well as malicious attacks in CMPs cache can cause sudden breakdown of those systems. The wear out of memory blocks at their primary stages can be avoided by wear leveling through distribution of writes to different blocks. This work represents an efficient scheme of wear leveling applied specifically for resistive memories. The major part of this work is developed around one dimensional two state CA. It has the aim to achieve uniform writes throughout all memory blocks with spatial access pattern predictions. The adjacent write-overloaded blocks are considered as an area subjected to remapping. The periodic boundary cellular automata (PBCA) employed for the scheme performs density classification task (DCT) to choose the remapping zone of memory. Remapping is executed through changing the current address location of the identified memory blocks to the new location. Further, the proposed memory write management policy can be implemented together with the fault tolerant memory architecture to develop a memory subsystem with more durability and robustness.
- Subjects
CELLULAR automata; FLASH memory; MEMORY; MEMORY loss; SPATIAL memory; WRITING processes
- Publication
IAENG International Journal of Computer Science, 2020, Vol 47, Issue 2, p310
- ISSN
1819-656X
- Publication type
Article