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- Title
Low‐cost multi‐standard video transform core using time‐distribution scheme.
- Authors
Chen, Y.‐H.; Tseng, Y.‐H.
- Abstract
Cost‐effective two‐dimensional (2D) discrete cosine transform (DCT) and inverse DCT architectures capable of supporting multiple standards of MPEG, H.264 and VC‐1 are presented. The proposed core utilises a 1D core and a transposed memory to achieve a low cost design. Multi‐level factor share is implemented in conjunction with distributed arithmetic in a system to enable the sharing of the coefficient matrix circuit in order to reduce hardware costs. The proposed approach employs a time‐distribution scheme to enable the simultaneous processing of the first and second dimensions to enhance throughput. A high efficiency of this approach was verified by fabricating a test chip using the TSMC 0.18 μm CMOS process. The architecture has an operating frequency of 200 MHz, and throughput of 800 M‐pixels/s with a gate count of 44.5 K.
- Publication
Electronics Letters (Wiley-Blackwell), 2016, Vol 52, Issue 23, p1980
- ISSN
0013-5194
- Publication type
Article
- DOI
10.1049/el.2016.3491