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- Title
SAMPLING FEE AND TRIGGER-LESS DAQ FOR THE J-PET SCANNER.
- Authors
KORCYL, G.; ALFS, D.; BEDNARSKI, T.; BIAŁAS, P.; CZERWIŃSKI, E.; DULSKI, K.; GAJOS, A.; GŁOWACZ, B.; JASIŃSKA, B.; KAMIŃSKA, D.; KAPŁON, Ł.; KOWALSKI, P.; KOZIK, T.; KRZEMIEŃ, W.; KUBICZ, E.; MOHAMME, M.; NIEDŹWIECKI, SZ.; PAŁKA, M.; PAWLIK-NIEDŹWIECKA, M.; RACZYŃSKI, L.
- Abstract
In this paper, we present a complete Data Acquisition System (DAQ) together with the readout mechanisms for the J-PET tomography scanner. In general, detector readout chain is constructed out of Front-End Electronics (FEE) measurement devices such as Time-to-Digital or Analog-to- Digital Converters (TDCs or ADCs), data collectors and storage. We have developed a system capable for maintaining continuous readout of digitized data without preliminary selection. Such operation mode results in up to 8 Gbps data stream, therefore, it is required to introduce a dedicated module for on-line event building and feature extraction. The Central Controller Module, equipped with Xilinx Zynq SoC and 16 optical transceivers, serves as such true real time computing facility. Our solution for the continuous data recording (trigger-less) is a novel approach in such detector systems and assures that most of the information is preserved on the storage for further, high-level processing. Signal discrimination applies a unique method of using LVDS buffers located in the FPGA fabric.
- Subjects
DATA acquisition systems; INFORMATION storage &; retrieval systems; SCANNING systems; OPTICAL transceivers; DATA recorders &; recording
- Publication
Acta Physica Polonica B, 2016, Vol 47, Issue 2, p491
- ISSN
0587-4254
- Publication type
Article
- DOI
10.5506/APhysPolB.47.491