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- Title
Digital Embedded Test Instrument for On-Chip Phase Noise Testing of Analog/RF Integrated Circuits.
- Authors
Azaïs, Florence; David-Grignot, Stéphane; Latorre, Laurent; Lefevre, François
- Abstract
This paper presents a digital embedded test instrument (ETI) for on-chip phase noise (PN) testing of analog/RF integrated circuits. The technique relies on 1-bit signal acquisition and dedicated processing to compute a digital signature related to the PN level. An appropriate algorithm based on on-the-fly processing of the 1-bit signal is defined in order to implement the BIST module with minimal hardware resources. Its implementation in CMOS 140nm technology occupies only 7,885m2, which represents an extremely small silicon area. Hardware measurements are performed on an FPGA prototype that validates the proposed instrument.
- Subjects
ANALOG integrated circuits; EMBEDDINGS (Mathematics); ON-chip transformers; PHASE noise; RADIO frequency integrated circuits; COMPLEMENTARY metal oxide semiconductors; SIGNAL processing
- Publication
Journal of Circuits, Systems & Computers, 2016, Vol 25, Issue 3, p-1
- ISSN
0218-1266
- Publication type
Article
- DOI
10.1142/S0218126616400144