Found: 16
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Low-Power Single Bitline Load Sense Amplifier for DRAM.
- Published in:
- Electronics (2079-9292), 2023, v. 12, n. 19, p. 4024, doi. 10.3390/electronics12194024
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- Article
Tunnel FET and MOSFET Hybrid Integrated 9T SRAM with Data-Aware Write Technique for Ultra-Low Power Applications.
- Published in:
- Electronics (2079-9292), 2022, v. 11, n. 20, p. 3392, doi. 10.3390/electronics11203392
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- Article
An 8T SRAM Array with Configurable Word Lines for In-Memory Computing Operation.
- Published in:
- Electronics (2079-9292), 2021, v. 10, n. 3, p. 300, doi. 10.3390/electronics10030300
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- Article
An Approach to Improving Homogeneous Cross-Project Defect Prediction by Jensen-Shannon Divergence and Relative Density.
- Published in:
- Scientific Programming, 2022, p. 1, doi. 10.1155/2022/4648468
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- Article
A 17.5–23 GHz high precision phase shifting four‐channel satellite communication receiver with phase calibration technology.
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- Microwave & Optical Technology Letters, 2021, v. 63, n. 12, p. 2903, doi. 10.1002/mop.32864
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- Article
In‐memory multibit multiplication and accumulation based on an automatic pulse generation circuit.
- Published in:
- Electronics Letters (Wiley-Blackwell), 2023, v. 59, n. 22, p. 1, doi. 10.1049/ell2.13036
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- Article
Static random‐access memory with embedded arithmetic logic units for in‐memory computing and ternary content addressable memory operation.
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- Electronics Letters (Wiley-Blackwell), 2022, v. 58, n. 25, p. 963, doi. 10.1049/ell2.12675
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- Article
In‐memory calculation with embedded arithmetic and logic units for deep neural network.
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- Electronics Letters (Wiley-Blackwell), 2022, v. 58, n. 17, p. 639, doi. 10.1049/ell2.12549
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- Article
Write‐enhanced and radiation‐hardened SRAM for multi‐node upset tolerance in space‐radiation environments.
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- International Journal of Circuit Theory & Applications, 2023, v. 51, n. 1, p. 398, doi. 10.1002/cta.3418
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- Article
Current mirror-based compensation circuit for multi-row read in-memory computing.
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- Electronics Letters (Wiley-Blackwell), 2019, v. 55, n. 22, p. 1176, doi. 10.1049/el.2019.2415
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- Article
Read-decoupled 8T1R non-volatile SRAM with dual-mode option and high restore yield.
- Published in:
- Electronics Letters (Wiley-Blackwell), 2019, v. 55, n. 9, p. 519, doi. 10.1049/el.2019.0295
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- Publication type:
- Article
Read‐decoupled 8T1R non‐volatile SRAM with dual‐mode option and high restore yield.
- Published in:
- Electronics Letters (Wiley-Blackwell), 2019, v. 55, n. 11, p. 519, doi. 10.1049/el.2019.0295
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- Publication type:
- Article
Self-compared bit-line pairs for eliminating effects of leakage current.
- Published in:
- Electronics Letters (Wiley-Blackwell), 2017, v. 53, n. 21, p. 1396, doi. 10.1049/el.2017.1130
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- Article
Self‐compared bit‐line pairs for eliminating effects of leakage current.
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- Electronics Letters (Wiley-Blackwell), 2017, v. 53, n. 21, p. 1396, doi. 10.1049/el.2017.1130
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- Publication type:
- Article
Efficient replica bitline technique for variation-tolerant timing generation scheme of SRAM sense amplifiers.
- Published in:
- Electronics Letters (Wiley-Blackwell), 2015, v. 51, n. 10, p. 742, doi. 10.1049/el.2015.0574
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- Publication type:
- Article
Efficient replica bitline technique for variation‐tolerant timing generation scheme of SRAM sense amplifiers.
- Published in:
- Electronics Letters (Wiley-Blackwell), 2015, v. 51, n. 10, p. 742, doi. 10.1049/el.2015.0574
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- Publication type:
- Article