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- Title
Abridging the CMOS Technology II.
- Authors
Wong, Hei
- Abstract
This document is a summary of an article titled "Abridging the CMOS Technology II" published in the journal Nanomaterials. The article discusses the advancements in nanosheet, forksheet, and CFET device structures, as well as 3D stacking techniques, that are expected to extend the lifespan of silicon CMOS devices. It also explores the challenges of achieving integration of 2D material ICs and the potential of innovative 2D materials for the future of integrated electronics. The article includes several review papers and regular papers on topics such as contact scaling, reliability concerns of FinFETs, carrier distribution in 2D quantized metal/insulator transition regions, flash memory technology, ZnO-based thin-film transistors, ESD protection strategies, and device innovation with emerging 2D semiconductor materials. The article concludes by stating that CMOS technology will remain the predominant integration technology for the foreseeable future, and the integration of innovative 2D materials into CMOS processes is expected to drive the next leap in technological advancement.
- Subjects
COMPLEMENTARY metal oxide semiconductors; TWO-dimensional materials (Nanotechnology); SINGLE walled carbon nanotubes; SILICON nanowires; WIDE gap semiconductors; HOT carriers; BUFFER layers
- Publication
Nanomaterials (2079-4991), 2024, Vol 14, Issue 11, p897
- ISSN
2079-4991
- Publication type
Article
- DOI
10.3390/nano14110897