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- Title
A 0.15-μm CMOS baseband LSI employing sleep mode with clock-offset compensation for M2M wireless sensor networks.
- Authors
Suzuki, Kenji; Yamagishi, Akihiro; Harada, Mitsuru
- Abstract
This paper describes a wireless baseband large-scale integration (LSI) that contains a sleep management circuit. The sleep manager performs the sleep-clock offset compensation and enables a wireless terminal (WT) with a typical crystal oscillator (XO) to remain in sleep mode for a long period while maintaining synchronization with the access point. Lab experiments show that the sleep period reaches 512 s and that, with intermittent operation, the WT maintains synchronization with the access point for 10 days. The LSI's average current consumption is as low as 11 μA for a 128-s sleep period. A wakeup detection circuit is also implemented in the LSI. This circuit performs paging control instead of a microprocessor unit (MPU) and this helps to reduce current consumption in the MPU and the flash read only memory (ROM). The single-chip baseband LSI is fabricated using 0.15- μm CMOS technology. It is 4.6 mm × 4.2 mm in area and consumes 4.0 μA for sleep operation. © 2015 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.
- Subjects
LARGE scale integration of circuits; BASEBAND; WIRELESS sensor networks; CRYSTAL oscillators; COMPLEMENTARY metal oxide semiconductors; FLASH memory; READ-only memory
- Publication
IEEJ Transactions on Electrical & Electronic Engineering, 2015, Vol 10, Issue 5, p576
- ISSN
1931-4973
- Publication type
Article
- DOI
10.1002/tee.22121