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- Title
FPGA Implementation of Snoopy Bus based Cache Coherence Protocols for Dual Processor System.
- Authors
Navya, Sambu; Sai, Y. Padma; Reddy, K. Swetha
- Abstract
When designing of Shared Memory Multiprocessor systems Cache Coherence becomes the great challenge to deal because incoherence may occur when the processors are working on the same data without any coordination. This coherence can be brought by using cache coherence protocols which are finite state machines which manages the cache and memory. This Paper aims at introducing cache coherence in details and providing a performance analysis of some of the cache coherence protocols. Thus this work is majorly focusing on implementation of MSI, MESI and MOESI cache coherence protocols using Xilinx ISE on FPGA and the way coherence protocols are designed are analysed perfectly.
- Subjects
FINITE state machines; CACHE memory; MULTIPROCESSORS
- Publication
Turkish Online Journal of Qualitative Inquiry, 2021, Vol 12, Issue 5, p3206
- ISSN
1309-6591
- Publication type
Article