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- Title
面向 100 Gbps 网络应用的 RISC-V CPU 设计与实现.
- Authors
李晓霖; 韩萌; 郝凯; 薛海韵; 卢圣健; 张昆明; 祁楠; 牛星茂; 肖利民; 郝沁汾
- Abstract
As a new open-source reduced instruction set architecture, RISC-V has advantages of low power consumption, small area and high performance. Therefore, technology and products based on RISC-V are developing rapidly. However, currently there are few medium and high end 64 bit CPU design instances based on the RISC-V architecture, and it is also hard to find corresponding commercial IP, especially for high-speed network applications. In this paper, we firstly improved the open source 64 bit U500 RISC-V SoC by extending the Bus width and adding L2 Cache, and etc. Secondly we implemented a complete 100 Gbps Ethernet function, which includes MAC, PCS, and SerDes, and the TX buffer and RX buffer used for the function. Finally we proved correctness and effectiveness of entire 64 bit RISC-V CPU design and 100 Gbps Ethernet function by simulation, FPGA verification and boot of Linux operation system. The designed RISC-V CPU and 100 Gbps Ethernet function can be applied to data center application such as smart network interface cards.
- Publication
Journal of Computer-Aided Design & Computer Graphics / Jisuanji Fuzhu Sheji Yu Tuxingxue Xuebao, 2021, Vol 33, Issue 6, p956
- ISSN
1003-9775
- Publication type
Article
- DOI
10.3724/SP.J.1089.2021.18538