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- Title
Effect of temperature-bias annealing on the hysteresis and subthreshold behavior of multilayer MoS<sub>2</sub> transistors.
- Authors
Giannazzo, F.; Fisichella, G.; Piazza, A.; Di Franco, S.; Greco, G.; Agnello, S.; Roccaforte, F.
- Abstract
The transfer characteristics ( ID- VG) of multilayers MoS2 transistors with a SiO2/Si backgate and Ni source/drain contacts have been measured on as-prepared devices and after annealing at different temperatures ( Tann from 150 °C to 200 °C) under a positive bias ramp ( VG from 0 V to +20 V). Larger Tann resulted in a reduced hysteresis of the ID- VG curves (from ∼11 V in the as-prepared sample to ∼2.5 V after Tann at 200 °C). The field effect mobility (∼30 cm2 V-1 s-1) remained almost unchanged after the annealing. On the contrary, the subthreshold characteristics changed from the common n-type behaviour in the as-prepared device to the appearance of a low current hole inversion branch after annealing. This latter effect indicates a modification of the Ni/MoS2 contact that can be explained by the formation of a low density of regions with reduced Schottky barrier height (SBH) for holes embedded in a background with low SBH for electrons. Furthermore, a temperature dependent analysis of the subthreshold characteristics revealed a reduction of the interface traps density from ∼9 × 1011 eV-1cm-2in the as-prepared device to ∼2 × 1011 eV-1cm-2after the 200 °C temperature-bias annealing, which is consistent with the observed hysteresis reduction.
- Subjects
TRANSISTORS; ANNEALING of metals; SCHOTTKY barrier; SEMICONDUCTOR-metal boundaries; SINGLE electron transistors; HYSTERESIS
- Publication
Physica Status Solidi - Rapid Research Letters, 2016, Vol 10, Issue 11, p797
- ISSN
1862-6254
- Publication type
Article
- DOI
10.1002/pssr.201600209