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- Title
FPGA implementation of LDPC soft-decision decoders based DCSK for spread spectrum applications.
- Authors
Hasan, Fadhil S.; Mosleh, Mahmood F.; Abdulhameed, Aya H.
- Abstract
Spread spectrum (SS) communications have attracted interest because of their channel attenuation immunity and low intercept potential. Apart from some extra features such as basic transceiver structures, chaotic communication would be the analog alternative to digital SS systems. Differential chaos shift keying (DCSK) systems, non-periodic and random characteristics among chaos carriers as well as their interaction with soft data are designed based on low-density parity-check (LDPC) codes in this brief. Because of simple structure, and glorious ability to correct errors. Using the Xilinx kintex7 FPGA development kit, we investigate the hardware performance and resource requirement tendencies of the DCSK communication system based on LDPC decoding algorithms (Prob. Domain, Log Domain and Min-Sum) over AWGN channel. The results indicate that the proposed system model has substantial improvements in the performance of the bit error rate (BER) and the real-time process. The Min-Sum decoder has relatively fewer FPGA resources than the other decoders. The implemented system will achieve 10-4 BER efficiency with 5 dB associate Eb/No as a coding gain.
- Subjects
BIT error rate; CHAOTIC communication; DIGITAL communications; ADDITIVE white Gaussian noise channels; TELECOMMUNICATION systems; DATABASE design; FIELD programmable gate arrays
- Publication
International Journal of Electrical & Computer Engineering (2088-8708), 2021, Vol 11, Issue 6, p4794
- ISSN
2088-8708
- Publication type
Article
- DOI
10.11591/ijece.v11i6.pp4794-4809