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- Title
Extensionless UTBB FDSOI Devices in Enhanced Dynamic Threshold Mode under Low Power Point of View.
- Authors
Akemi Sasaki, Katia Regina; Martino, Joao Antonio; Aoulaiche, Marc; Simoen, Eddy; Claeys, Cor
- Abstract
This work presents an analysis about the influence of the gate and source/drain underlap length (LUL) on UTBB FDSOI (UltraThin-Body-and-Buried-oxide Fully-Depleted-Silicon-On-Insulator) devices operating in conventional (VB = 0 V), dynamic threshold (DT, VB = VG), and the enhanced DT (eDT, VB = kVG) configurations, focusing on low power applications. It is shown that the underlap devices present a lower off-state current (IOFF at VG = 0 V), lower subthreshold swing (S), lower gate-induced drain leakage (GIDL), higher transconductance over drain current (gm/ID) ratio and higher intrinsic voltage gain (|AV|) due to their longer effective channel length in weak inversion and lower lateral electric field, while the eDT mode presents higher on-state current (ION) with the same IOFF, lower S, higher maximum transconductance (gmmax), lower threshold voltage (VT), higher gm/ID ratio and higher |AV| due to the dynamically reduced threshold voltage and stronger transversal electric field.
- Subjects
LOW voltage integrated circuits; SILICON-on-insulator technology; ENERGY consumption; COMPUTER simulation of threshold voltage; LOGIC circuits
- Publication
Journal of Low Power Electronics & Applications, 2015, Vol 5, Issue 2, p69
- ISSN
2079-9268
- Publication type
Article
- DOI
10.3390/jlpea5020069