We found a match
Your institution may have access to this item. Find your institution then sign in to continue.
- Title
Joint frequency scaling of processor and DRAM.
- Authors
Sundriyal, Vaibhav; Sosonkina, Masha
- Abstract
Energy efficiency and energy-proportional computing have become a central focus in modern supercomputers. Many previous energy-saving strategies have focused solely on the CPU while the DRAM subsystem has not been addressed sufficiently, even though memory consumes about 20 % of the total power in a typical server platform. This paper describes a novel runtime system that scales the frequency of both processor and DRAM-based on the performance and power models, also proposed here. Specifically, first, a performance-loss constraint is chosen for an application, then, an optimal processor-DRAM frequency pair is modeled such that the pair minimizes the energy consumption in a given timeslice. Experiments performed on SPEC CPU™ 2006, NAS NPB, and pARMS benchmarks demonstrate that the proposed runtime system may obtain total energy savings both for memory- and compute-intensive applications. In particular, as much as 22 % of energy was saved with a low performance loss of about 4.8 %.
- Subjects
DYNAMIC random access memory; SUPERCOMPUTERS; ENERGY consumption of computers; MICROPROCESSORS; COMPUTER storage devices
- Publication
Journal of Supercomputing, 2016, Vol 72, Issue 4, p1549
- ISSN
0920-8542
- Publication type
Article
- DOI
10.1007/s11227-016-1680-4