We found a match
Your institution may have access to this item. Find your institution then sign in to continue.
- Title
OPTIMIZED REVERSIBLE MULTIPLIER CIRCUIT.
- Authors
Haghparast, Majid; Mohammadi, Majid; Navi, Keivan; Eshghi, Mohammad
- Abstract
Reversible logic circuits have received significant attention in quantum computing, low power CMOS design, optical information processing, DNA computing, bioinformatics, and nanotechnology. This paper presents two new 4 × 4 bit reversible multiplier designs which have lower hardware complexity, less garbage bits, less quantum cost and less constant inputs than previous ones, and can be generalized to construct efficient reversible n × n bit multipliers. An implementation of reversible HNG is also presented. This implementation shows that the full adder design using HNG is one of the best designs in term of quantum cost. An implementation of MKG is also presented in order to have a fair comparison between our proposed reversible multiplier designs and the existing counterparts. The proposed reversible multipliers are optimized in terms of quantum cost, number of constant inputs, number of garbage outputs and hardware complexity. They can be used to construct more complex systems in nanotechnology.
- Subjects
LOGIC circuit design; ELECTRONIC circuit design; QUANTUM computers; NANOTECHNOLOGY equipment; LOW voltage integrated circuits
- Publication
Journal of Circuits, Systems & Computers, 2009, Vol 18, Issue 2, p311
- ISSN
0218-1266
- Publication type
Article
- DOI
10.1142/S0218126609005083