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- Title
New Architecture for EIA-709.1 Protocol Implementation.
- Authors
Su Goog Shon; Soo Mi Yang; Jae Jo Lee
- Abstract
This paper proposes a new architecture for EIA-709.1 protocol implementation. The protocol is conventionally implemented with the proprietary processor and language, Neuron chip and Neuron C, respectively, where the Neuron chip consists of 3 processors inside. The proposed architecture uses only one general purpose processor and general ANSI C to implement the layers of EIA-709.1 except the physical layer. The data link, network, and other layers are implemented onto one RISC processor, ARM. Specifically, the data link layer of the EIA-709.1 based on predictive p-persistent CSMA/CA is implemented. The interface between the transceiver based on power line communication and the data link layer based on the ARM is described. As a conclusion, this research shows the improvement of performance and the compatibility with the existing Neuron chip.
- Subjects
COMPUTER network architectures; COMPUTER network protocols; MICROPROCESSORS; RISC microprocessors; COMPUTER interfaces; INTEGRATED circuits
- Publication
GSTF Journal on Computing, 2011, Vol 1, Issue 2, p180
- ISSN
2010-2283
- Publication type
Article
- DOI
10.5176/2010-2283_1.2.57