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- Title
Nanopore-application CMOS potentiostat design with input parasitic compensation.
- Authors
Jungsuk Kim; Dunbar, W. B.
- Abstract
A low-noise area-efficient potentiostat design for nanopore applications is presented. By adopting a cascode amplifier and a Wilson current mirror, the input resistance is drastically decreased, which enables one to obtain a desirable bandwidth to detect DNA translocation events in nanopore sensors. A novel compensation technique is also proposed to relieve a deleterious effect by the input parasitic capacitances.
- Subjects
POTENTIOSTAT; NANOPORES; ELECTRIC capacity; DNA analysis; DETECTORS; EQUIPMENT &; supplies
- Publication
Electronics Letters (Wiley-Blackwell), 2014, Vol 50, Issue 8, p576
- ISSN
0013-5194
- Publication type
Article
- DOI
10.1049/el.2014.0049